Designing the ISA is a very critical activity in the entire ASIP design process. There is a long history of using automated tools that suggest custom instructions based on an analysis of the data flow graph (DFGs) of target programs. Even though such approaches can generate an optimal set of instructions given enough computational time, they generate a processor that is overspecialized for a small set of applications. In this paper we consider a different kind of processors that need to function well as both general purpose processors as well as specialized processors. In this case we cannot afford a large set of highly customized instructions.
We propose a new kind of approach that uses novel visualization techniques to first understand the impact of different ISA features by comparing the execution on different popular ISAs: RISC and CISC. Our novel graphical methods provide simple and intuitive explanations for differences in performance across ISAs for the same micro-architecture. Moreover, we can use this information to pick desirable instructions from other ISAs and evaluate their impact when they are incorporated. We show examples where we are able to increase the performance by 10-28% of 6 Spec2006 benchmarks by just adding 2-10 extra instructions in a basic RISC ISA.