Ensuring the functional correctness of Networks-on-Chip (NoC) can be particularly challenging, and communication-centric debug methodologies have been widely used by engineers to validate NoC functionality during post-silicon validation. Design-for-Debug structures such as trace buffers and monitors are usually inserted in such Systems-on-Chip to enhance signal visibility. However, this debug hardware becomes unusable once the chip goes into production, leading to a significant area overhead. While the size and organization of the router buffers directly impact network throughput, these buffers also dominate the on-chip router area. We propose a scheme AugVC to reuse trace buffers to augment router buffers, with the objective of improving the overall network performance. Experimental results show that our proposed approach can reduce latency by up to 38.25%. We also propose an extension, called Output Port directed Virtual Channel (ODVC), that uses a modified virtual channel assignment strategy, on the basis of the designated output port of a network packet. This strategy improves the performance and area of the router by 45% and 32.4% respectively.